EPM7128BTC144-7 OverviewThe mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).In the 144-LQFP package, you will find it.In this case, there are 100 I/Os programmed.144 terminations are programmed into the device.This electrical component has a terminal position of QUAD.An electrical supply voltage of 2.5V is used to power it.Tray should be used to package the chip.Due to its reliability, it is operated at a temperature of 0°C~70°C TA.There should be a Surface Mount on the chip.The FPGA belongs to the MAX® 7000B series.This device also displays YES.The EPM7128 shows its related parts.A digital circuit can be constructed using 2500 gates.8logic blocks/elements are present.There is a maximum supply voltage (Vsup) of 2.625V.If the supply voltage (Vsup) is greater than 2.375V, then the device will work properly.It is recommended that the clock frequency not exceed 243.9MHz.
EPM7128BTC144-7 Features144-LQFP package
100 I/Os
The operating temperature of 0°C~70°C TA
EPM7128BTC144-7 ApplicationsThere are a lot of Intel
EPM7128BTC144-7 CPLDs applications.
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
| Mounting Type | Surface Mount |
| Package / Case | 144-LQFP |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000B |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 144 |
| ECCN Code | 3A991 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Additional Feature | YES |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 2.5V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7128 |
| JESD-30 Code | S-PQFP-G144 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 2.625V |
| Supply Voltage-Min (Vsup) | 2.375V |
| Programmable Type | In System Programmable |
| Number of I/O | 100 |
| Clock Frequency | 243.9MHz |
| Propagation Delay | 4 ns |
| Number of Gates | 2500 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| Voltage Supply - Internal | 2.375V~2.625V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 8 |
| Length | 20mm |
| Height Seated (Max) | 1.6mm |
| Width | 20mm |
| RoHS Status | Non-RoHS Compliant |