EPM7128ELC84-15 Overview 128 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a 84-LCC (J-Lead) package.The device is programmed with 68 I/O ports.It is programmed to terminate devices at 84.There is a QUAD terminal position on the electrical part in question.The device is powered by a voltage of 5V volts.It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at 0°C~70°C TA.It is recommended to mount the chip by Surface Mount.FPGAs belonging to the MAX® 7000 series contain this type of chip.You can find its related parts in the EPM7128.2500 gates are used to construct digital circuits.8 logic elements/blocks exist.A power supply of 3.3/55V volts is required to operate this device.Initially, the maximum supply voltage (Vsup) is 5.25V.Voltage supply (Vsup) should be higher than 4.75V.The clock frequency of this device should not exceed 100MHz.
EPM7128ELC84-15 Features84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7128ELC84-15 ApplicationsThere are a lot of Intel
EPM7128ELC84-15 CPLDs applications.
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
Field programmable gate
Address decoding
D/T registers and latches
Synchronous or asynchronous mode
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7128 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | EE PLD |
| Number of I/O | 68 |
| Clock Frequency | 100MHz |
| Propagation Delay | 15 ns |
| Number of Gates | 2500 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 15ns |
| Number of Logic Elements/Blocks | 8 |
| Length | 29.3116mm |
| Width | 29.3116mm |
| RoHS Status | Non-RoHS Compliant |