EPM7160ELC84-12 OverviewThere are 160 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The product is contained in a 84-LCC (J-Lead) package.It is equipped with 68 I/O ports.The termination of a device is set to 84.This electrical part has a terminal position of QUAD and is connected to the ground.The power source is powered by 5V volts.Ideally, the chip should be packaged by Tray.A reliable operation is ensured by the operating temperature of [0].Ensure that the chip is mounted by Surface Mount.In this case, it is a type of FPGA belonging to the MAX® 7000 series.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V when using this device.EPM7160 contains its related parts.In digital circuits, 3200 gates serve as building blocks.A logic element or block has 10 elements.Currently, it is powered by 3.3/55V sources.Supply voltage (Vsup) reaches a maximum of 5.25V.There should be a higher supply voltage (Vsup) than 4.75V.A frequency of 125MHz should not be exceeded by its clock.
EPM7160ELC84-12 Features84-LCC (J-Lead) package
68 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7160ELC84-12 ApplicationsThere are a lot of Intel
EPM7160ELC84-12 CPLDs applications.
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
Field programmable gate
Address decoding
D/T registers and latches
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 84 |
| Terminal Finish | TIN LEAD |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Reach Compliance Code | compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7160 |
| JESD-30 Code | S-PQCC-J84 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | EE PLD |
| Number of I/O | 68 |
| Clock Frequency | 125MHz |
| Propagation Delay | 12 ns |
| Organization | 0 DEDICATED INPUTS, 64 I/O |
| Number of Gates | 3200 |
| Output Function | MACROCELL |
| Number of Macro Cells | 160 |
| JTAG BST | NO |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 12ns |
| Number of Logic Elements/Blocks | 10 |
| Length | 29.3116mm |
| Height Seated (Max) | 5.08mm |
| Width | 29.3116mm |
| RoHS Status | Non-RoHS Compliant |