EPM7160ELC84-12,Intel EPM7160ELC84-12 price,Integrated Circuits (ICs) EPM7160ELC84-12 Distributor,EPM7160ELC84-12 supplier
EPM7160ELC84-12,Intel EPM7160ELC84-12 price,Integrated Circuits (ICs) EPM7160ELC84-12 Distributor,EPM7160ELC84-12 supplier
EPM7160ELC84-12
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EPM7160ELC84-12
    Part Number:KY-EPM7160ELC84-12
    Mfr. Part No:EPM7160ELC84-12
    Mfr.:Intel
    Stock:11233
    Description: 3.3/55V 1.27mm PMIC MAX® 7000 Series EPM7160 5V 84-LCC (J-Lead)
    Data Sheet:EPM7160ELC84-12 Datasheet
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  • EPM7160ELC84-12 Overview
    There are 160 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.The product is contained in a 84-LCC (J-Lead) package.It is equipped with 68 I/O ports.The termination of a device is set to 84.This electrical part has a terminal position of QUAD and is connected to the ground.The power source is powered by 5V volts.Ideally, the chip should be packaged by Tray.A reliable operation is ensured by the operating temperature of [0].Ensure that the chip is mounted by Surface Mount.In this case, it is a type of FPGA belonging to the MAX® 7000 series.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V when using this device.EPM7160 contains its related parts.In digital circuits, 3200 gates serve as building blocks.A logic element or block has 10 elements.Currently, it is powered by 3.3/55V sources.Supply voltage (Vsup) reaches a maximum of 5.25V.There should be a higher supply voltage (Vsup) than 4.75V.A frequency of 125MHz should not be exceeded by its clock.
    EPM7160ELC84-12 Features
    84-LCC (J-Lead) package
    68 I/Os
    The operating temperature of 0°C~70°C TA
    3.3/55V power supplies

    EPM7160ELC84-12 Applications
    There are a lot of Intel
    EPM7160ELC84-12 CPLDs applications.

    Custom state machines
    Digital systems
    Portable digital devices
    Handheld digital devices
    Battery operated portable devices
    Complex programmable logic devices
    Digital designs
    Field programmable gate
    Address decoding
    D/T registers and latches
    Mounting TypeSurface Mount
    Package / Case84-LCC (J-Lead)
    Surface MountYES
    Operating Temperature0°C~70°C TA
    PackagingTray
    SeriesMAX® 7000
    JESD-609 Codee0
    Part StatusObsolete
    Moisture Sensitivity Level (MSL)3 (168 Hours)
    Number of Terminations84
    Terminal FinishTIN LEAD
    Additional FeatureCONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
    HTS Code8542.39.00.01
    Terminal PositionQUAD
    Terminal FormJ BEND
    Peak Reflow Temperature (Cel)220
    Supply Voltage5V
    Terminal Pitch1.27mm
    Reach Compliance Codecompliant
    Time@Peak Reflow Temperature-Max (s)30
    Base Part NumberEPM7160
    JESD-30 CodeS-PQCC-J84
    Qualification StatusNot Qualified
    Supply Voltage-Max (Vsup)5.25V
    Power Supplies3.3/55V
    Supply Voltage-Min (Vsup)4.75V
    Programmable TypeEE PLD
    Number of I/O68
    Clock Frequency125MHz
    Propagation Delay12 ns
    Organization0 DEDICATED INPUTS, 64 I/O
    Number of Gates3200
    Output FunctionMACROCELL
    Number of Macro Cells160
    JTAG BSTNO
    Voltage Supply - Internal4.75V~5.25V
    Delay Time tpd(1) Max12ns
    Number of Logic Elements/Blocks10
    Length29.3116mm
    Height Seated (Max)5.08mm
    Width29.3116mm
    RoHS StatusNon-RoHS Compliant
    
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