EPM7160SLC84-10N OverviewThis network has 160macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package 84-LCC (J-Lead).As a result, it has 64 I/O ports programmed.84 terminations have been programmed into the device.Its terminal position is QUAD.It is powered by a voltage of 5V volts.Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.In terms of FPGAs, it belongs to the MAX® 7000S series.This device can also display CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.Its related parts can be found in the [0].The 3200 gates serve as building blocks for digital circuits.This logic block consists of 10 logic elements.A total of 3.3/55V power supplies are needed to run it.5.25V represents the maximal supply voltage (Vsup).Ensure that the supply voltage (Vsup) exceeds 4.75V.This device should not have an clock frequency greater than 125MHz.
EPM7160SLC84-10N Features84-LCC (J-Lead) package
64 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7160SLC84-10N ApplicationsThere are a lot of Intel
EPM7160SLC84-10N CPLDs applications.
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
| Mounting Type | Surface Mount |
| Package / Case | 84-LCC (J-Lead) |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | MAX® 7000S |
| JESD-609 Code | e3 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 84 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| HTS Code | 8542.39.00.01 |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Reach Compliance Code | compliant |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Base Part Number | EPM7160 |
| JESD-30 Code | S-PQCC-J84 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 5.25V |
| Power Supplies | 3.3/55V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Programmable Type | In System Programmable |
| Number of I/O | 64 |
| Clock Frequency | 125MHz |
| Number of Gates | 3200 |
| Output Function | MACROCELL |
| Number of Macro Cells | 160 |
| JTAG BST | YES |
| Voltage Supply - Internal | 4.75V~5.25V |
| Delay Time tpd(1) Max | 10ns |
| Number of Logic Elements/Blocks | 10 |
| Length | 29.3116mm |
| Height Seated (Max) | 5.08mm |
| Width | 29.3116mm |
| RoHS Status | RoHS Compliant |