EPM7160SLC84-6 Overview
There are 160 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the 84-LCC (J-Lead) package.It is programmed with 64 I/Os.There are 84 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is QUAD, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 5V.It is packaged in the way of Tray.It operates with the operating temperature of 0°C~70°C TA to ensure its reliability.It is mounted in the way of Surface Mount.It is a type of FPGA belonging to the MAX® 7000S series.According to the EPM7160, its related parts can be found.There are 3200 gates, which are devices that acts as a building block for digital circuits. There are 10 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.It operates from 3.3/55V power supplies.The maximal supply voltage (Vsup) reaches 5.25V.The supply voltage (Vsup) should be greater than 4.75V.Its clock frequency should not exceed 166.7MHz.
EPM7160SLC84-6 Features
84-LCC (J-Lead) package
64 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies

EPM7160SLC84-6 Applications
There are a lot of Intel
EPM7160SLC84-6 CPLDs applications.

Power up sequencing
Voltage level translation
Timing control
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems

Mounting Type	Surface Mount
Package / Case	84-LCC (J-Lead)
Surface Mount	YES
Operating Temperature	0°C~70°C TA
Packaging	Tray
Series	MAX® 7000S
JESD-609 Code	e0
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
Number of Terminations	84
Terminal Finish	Tin/Lead (Sn/Pb)
HTS Code	8542.39.00.01
Terminal Position	QUAD
Terminal Form	J BEND
Peak Reflow Temperature (Cel)	220
Supply Voltage	5V
Terminal Pitch	1.27mm
Time@Peak Reflow Temperature-Max (s)	30
Base Part Number	EPM7160
JESD-30 Code	S-PQCC-J84
Qualification Status	Not Qualified
Supply Voltage-Max (Vsup)	5.25V
Power Supplies	3.3/55V
Supply Voltage-Min (Vsup)	4.75V
Programmable Type	In System Programmable
Number of I/O	64
Clock Frequency	166.7MHz
Propagation Delay	6 ns
Number of Gates	3200
Output Function	MACROCELL
Number of Macro Cells	160
JTAG BST	YES
Voltage Supply - Internal	4.75V~5.25V
Delay Time tpd(1) Max	6ns
Number of Logic Elements/Blocks	10
Length	29.3116mm
Height Seated (Max)	5.08mm
Width	29.3116mm
RoHS Status	Non-RoHS Compliant