EPM7160SLC84-7 OverviewThere are 160 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is part of the 84-LCC (J-Lead) package.The device has 64 inputs and outputs.There are 84 terminations programmed into the device.As the terminal position of this electrical part is QUAD, it serves as an important access point for passengers or freight.Power is supplied by a voltage of 5V volts.The chip should be packaged by Tray.The temperature at which it operates is set to 0°C~70°C TA in order to ensure its reliability.Surface Mount should be used for mounting the chip.The MAX® 7000S series comprises this type of FPGA.The device can also be used to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.The EPM7160 indicates that related parts can be found.It is possible to construct digital circuits using 3200 gates, which are devices that serve as building blocks.There are 10 logic elements or blocks present.In order for the device to operate, it requires 3.3/55V power supplies.Vsup reaches 5.25V as the maximum supply voltage.A supply voltage (Vsup) of greater than 4.75V should be used.The clock frequency of the device should not exceed 166.7MHz.
EPM7160SLC84-7 Features84-LCC (J-Lead) package
64 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7160SLC84-7 ApplicationsThere are a lot of Intel
EPM7160SLC84-7 CPLDs applications.
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Mounting Type | Surface Mount |
Package / Case | 84-LCC (J-Lead) |
Surface Mount | YES |
Operating Temperature | 0°C~70°C TA |
Packaging | Tray |
Series | MAX® 7000S |
JESD-609 Code | e0 |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 2 (1 Year) |
Number of Terminations | 84 |
ECCN Code | EAR99 |
Terminal Finish | Tin/Lead (Sn/Pb) |
Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code | 8542.39.00.01 |
Terminal Position | QUAD |
Terminal Form | J BEND |
Peak Reflow Temperature (Cel) | 220 |
Supply Voltage | 5V |
Terminal Pitch | 1.27mm |
Time@Peak Reflow Temperature-Max (s) | 30 |
Base Part Number | EPM7160 |
JESD-30 Code | S-PQCC-J84 |
Qualification Status | Not Qualified |
Supply Voltage-Max (Vsup) | 5.25V |
Power Supplies | 3.3/55V |
Supply Voltage-Min (Vsup) | 4.75V |
Programmable Type | In System Programmable |
Number of I/O | 64 |
Clock Frequency | 166.7MHz |
Propagation Delay | 7.5 ns |
Number of Gates | 3200 |
Output Function | MACROCELL |
Number of Macro Cells | 160 |
JTAG BST | YES |
Voltage Supply - Internal | 4.75V~5.25V |
Delay Time tpd(1) Max | 7.5ns |
Number of Logic Elements/Blocks | 10 |
Length | 29.3116mm |
Height Seated (Max) | 5.08mm |
Width | 29.3116mm |
RoHS Status | Non-RoHS Compliant |