EPM7192EGC160-12 OverviewThere are 192 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the 160-BPGA package.It is programmed with 124 I/Os.There are 160 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is PERPENDICULAR, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 5V.It is packaged in the way of Tray.It operates with the operating temperature of 0°C~70°C TA to ensure its reliability.It is mounted in the way of Surface Mount.It is a type of FPGA belonging to the MAX® 7000 series.It is also characterized by CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V.According to the EPM7192, its related parts can be found.There are 3750 gates, which are devices that acts as a building block for digital circuits. There are 12 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.It operates from 3.3/55V power supplies.The maximal supply voltage (Vsup) reaches 5.25V.The supply voltage (Vsup) should be greater than 4.75V.
EPM7192EGC160-12 Features160-BPGA package
124 I/Os
The operating temperature of 0°C~70°C TA
3.3/55V power supplies
EPM7192EGC160-12 ApplicationsThere are a lot of Intel
EPM7192EGC160-12 CPLDs applications.
Power up sequencing
Voltage level translation
Timing control
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Mounting Type | Surface Mount |
Package / Case | 160-BPGA |
Surface Mount | NO |
Operating Temperature | 0°C~70°C TA |
Packaging | Tray |
Series | MAX® 7000 |
Part Status | Obsolete |
Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
Number of Terminations | 160 |
Terminal Finish | TIN/LEAD (SN/PB) |
Additional Feature | CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
HTS Code | 8542.39.00.01 |
Terminal Position | PERPENDICULAR |
Terminal Form | PIN/PEG |
Peak Reflow Temperature (Cel) | 220 |
Supply Voltage | 5V |
Terminal Pitch | 2.54mm |
Reach Compliance Code | compliant |
Time@Peak Reflow Temperature-Max (s) | 30 |
Base Part Number | EPM7192 |
JESD-30 Code | S-CPGA-P160 |
Qualification Status | Not Qualified |
Supply Voltage-Max (Vsup) | 5.25V |
Power Supplies | 3.3/55V |
Supply Voltage-Min (Vsup) | 4.75V |
Programmable Type | EE PLD |
Number of I/O | 124 |
Number of Gates | 3750 |
Output Function | MACROCELL |
Number of Macro Cells | 192 |
JTAG BST | NO |
Voltage Supply - Internal | 4.75V~5.25V |
Delay Time tpd(1) Max | 12ns |
Number of Logic Elements/Blocks | 12 |
Length | 39.624mm |
Height Seated (Max) | 5.34mm |
Width | 39.624mm |
RoHS Status | Non-RoHS Compliant |