LA4064ZC-75TN48E,Lattice Semiconductor Corporation LA4064ZC-75TN48E supplier,Lattice Semiconductor Corporation LA4064ZC-75TN48E priceIntegrated Circuits (ICs)
LA4064ZC-75TN48E,Lattice Semiconductor Corporation LA4064ZC-75TN48E supplier,Lattice Semiconductor Corporation LA4064ZC-75TN48E priceIntegrated Circuits (ICs)
LA4064ZC-75TN48E
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LA4064ZC-75TN48E
    Part Number:KY-LA4064ZC-75TN48E
    Mfr. Part No:LA4064ZC-75TN48E
    Mfr.:Lattice Semiconductor Corporation
    Stock:3124
    Description: 1.8V 0.5mm PMIC LA-ispMACH Series LA4064 48 Pin 3.3V 48-TQFP
    Data Sheet:LA4064ZC-75TN48E Datasheet
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  • LA4064ZC-75TN48E Overview
    There are 64 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].The device is programmed with 32 I/Os.Devices are programmed with terminations of 48.This electrical part has a terminal position of QUAD, which serves as an important point of access for passengers and freight.The power supply voltage is 3.3V.Tray is the packaging method.To ensure reliability, the device operates at a temperature of -40°C~125°C TA.It is recommended that the chip be mounted by Surface Mount.As part of the LA-ispMACH series, it is a type of FPGA.48 pins are programmed on the chip.This device is also capable of displaying YES.In accordance with the LA4064, its related parts are listed.Data is stored using EEPROM.Surface Mount is used to mount this electronic component.A total of 48 pins are provided on this board.It operates at a maximum supply voltage of 1.9V volts.Initially, it requires a voltage of 1.7V as the minimum supply voltage.There is 1.8V power supply available for it.There should be a lower maximum frequency than 168MHz.In its simplest form, it consists of 4 logic blocks (LABs).
    LA4064ZC-75TN48E Features
    48-TQFP package
    32 I/Os
    The operating temperature of -40°C~125°C TA
    48 pin count
    48 pins
    1.8V power supplies
    4 logic blocks (LABs)

    LA4064ZC-75TN48E Applications
    There are a lot of Lattice Semiconductor Corporation
    LA4064ZC-75TN48E CPLDs applications.

    Timing control
    Interface bridging
    I/O expansion
    Discrete logic functions
    Bootloaders for FPGAs
    Address decoders
    Custom state machines
    Digital systems
    Portable digital devices
    Handheld digital devices
    Factory Lead Time8 Weeks
    MountSurface Mount
    Mounting TypeSurface Mount
    Package / Case48-TQFP
    Number of Pins48
    Operating Temperature-40°C~125°C TA
    PackagingTray
    SeriesLA-ispMACH
    Published2000
    JESD-609 Codee3
    Pbfree Codeyes
    Part StatusActive
    Moisture Sensitivity Level (MSL)3 (168 Hours)
    Number of Terminations48
    ECCN CodeEAR99
    Terminal FinishMatte Tin (Sn)
    Additional FeatureYES
    Terminal PositionQUAD
    Terminal FormGULL WING
    Peak Reflow Temperature (Cel)260
    Supply Voltage3.3V
    Terminal Pitch0.5mm
    Time@Peak Reflow Temperature-Max (s)40
    Base Part NumberLA4064
    Pin Count48
    Qualification StatusNot Qualified
    Power Supplies1.8V
    Programmable TypeIn System Programmable
    Max Supply Voltage1.9V
    Min Supply Voltage1.7V
    Operating Supply Current109μA
    Number of I/O32
    Nominal Supply Current109μA
    Memory TypeEEPROM
    Propagation Delay8 ns
    Max Frequency168MHz
    Screening LevelAEC-Q100
    Number of Logic Blocks (LABs)4
    Output FunctionMACROCELL
    Number of Macro Cells64
    JTAG BSTYES
    Voltage Supply - Internal1.7V~1.9V
    Delay Time tpd(1) Max7.5ns
    Length7mm
    Height Seated (Max)1.2mm
    Width7mm
    RoHS StatusROHS3 Compliant
    Lead FreeLead Free
    
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