LC4064ZC-5M132C OverviewThere are 64 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).It is embedded in the 132-LFBGA, CSPBGA package.It is programmed with 64 I/Os.There are 132 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line.The terminal position of this electrical part is BOTTOM, which serves as an important access point for passengers or freight.It is powered from a supply voltage of 1.8V.It is packaged in the way of Tray.It operates with the operating temperature of 0°C~90°C TJ to ensure its reliability.It is mounted in the way of Surface Mount.It is a type of FPGA belonging to the ispMACH® 4000Z series.It is equipped with 132 pin count.It is also characterized by YES.According to the LC4064, its related parts can be found.The supply voltage should be maintained at 1.8V for high efficiency.EEPROM is adopted for storing data.This electronic part is mounted in the way of Surface Mount.It is designed with 132 pins.It operates with the maximal supply voltage of 1.9V.It operates with the minimal supply voltage of 1.7V.There are 4 logic elements/blocks, which are fundamental building blocks of field-programmable gate array (FPGA) technology.There are 432 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. The maximal frequency should be lower than 250MHz.There are 10 dedicated inputs used to detect the status of input signals.
LC4064ZC-5M132C Features132-LFBGA, CSPBGA package
64 I/Os
The operating temperature of 0°C~90°C TJ
132 pin count
132 pins
LC4064ZC-5M132C ApplicationsThere are a lot of Lattice Semiconductor Corporation
LC4064ZC-5M132C CPLDs applications.
Power up sequencing
Voltage level translation
Timing control
Interface bridging
I/O expansion
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 132-LFBGA, CSPBGA |
| Number of Pins | 132 |
| Operating Temperature | 0°C~90°C TJ |
| Packaging | Tray |
| Series | ispMACH® 4000Z |
| Published | 2000 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 132 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| Additional Feature | YES |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | LC4064 |
| Pin Count | 132 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 1.8V |
| Programmable Type | In System Programmable |
| Max Supply Voltage | 1.9V |
| Min Supply Voltage | 1.7V |
| Operating Supply Current | 80μA |
| Number of I/O | 64 |
| Nominal Supply Current | 80μA |
| Memory Type | EEPROM |
| Propagation Delay | 5 ns |
| Max Frequency | 250MHz |
| Number of Programmable I/O | 432 |
| Output Function | MACROCELL |
| Number of Macro Cells | 64 |
| JTAG BST | YES |
| Number of Dedicated Inputs | 10 |
| Voltage Supply - Internal | 1.7V~1.9V |
| Delay Time tpd(1) Max | 5ns |
| Number of Logic Elements/Blocks | 4 |
| Length | 8mm |
| Height Seated (Max) | 1.35mm |
| Width | 8mm |
| RoHS Status | Non-RoHS Compliant |
| Lead Free | Lead Free |
LC4064ZC-5M132C Datasheet
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