The LMK04832NKDT is an ultra-high-performance clock conditioner with JEDEC JESD204B support and is also pin compatible with the LMK0482x family of devices. The 14 clock outputs from PLL2 can be configured to drive seven JESD204B converters or other logic devices using device and SYSREF clocks. SYSREF can be provided using both DC and AC coupling. Not limited to JESD204B applications, each of the 14 outputs can be individually configured as high-performance outputs for traditional clocking systems.

Maximum Clock Output Frequency: 3255 MHz

Multi-Mode: Dual PLL, Single PLL, and Clock Distribution

1-1023 CLKout Divider

1-8191 SYSREF Divider

25-ps Step Analog Delay for SYSREF Clocks

Digital Delay and Dynamic Digital Delay for Device Clock and SYSREF

Test and Measurement

RADAR

Microwave Backhaul

Data Converter Clocking