SI5325A-C-GMR Overview
Clock generator is packaged in the way of Tape & Reel (TR). Clock PLL is embedded in the 36-VFQFN Exposed Pad package. Clock is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 1.4GHz is the maximal value for normal operation. PLL clock is mounted in the way of Surface Mount. Clock generators should operate with the voltage supply of 1.71V~3.63V. The temperature should be set at -40°C~85°C to ensure reliable performance. CML, LVCMOS, LVDS, LVPECL is designed for clock generator's output. This electronic component can be classified into Clock Multiplier. According to the base part number, its related parts can be founded. Clock generator is designed with 36 pins. This clock generator is a member of DSPLL® series. Clock PLL is configured with 2 output.
SI5325A-C-GMR Features
Available in the 36-VFQFN Exposed Pad

SI5325A-C-GMR Applications
There are a lot of Silicon Labs
SI5325A-C-GMR Clock Generators applications.

Wireless infrastructure
Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet

Factory Lead Time	6 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	36-VFQFN Exposed Pad
Number of Pins	36
Operating Temperature	-40°C~85°C
Packaging	Tape & Reel (TR)
Series	DSPLL®
Published	1997
Part Status	Active
Moisture Sensitivity Level (MSL)	2 (1 Year)
Type	Clock Multiplier
Voltage - Supply	1.71V~3.63V
Base Part Number	SI5325
Output	CML, LVCMOS, LVDS, LVPECL
Number of Outputs	2
Number of Circuits	1
Frequency (Max)	1.4GHz
Input	Clock
Ratio - Input:Output	2:2
PLL	Yes
Differential - Input:Output	Yes/Yes
Radiation Hardening	No
RoHS Status	RoHS Compliant