SI5347C-B-GM Overview
This clock IC is packaged using the Tray method. The 64-VFQFN Exposed Pad package includes this clock generator. In the reflowing process, this clock generator ic is able to maintain a maximum temperature of 260. In it, there are 64 terminations to be found. This time clock generator should be voltaged at 1.8V. A clock generator's input is called LVCMOS, LVDS, LVPECL, Crystal and it is designed as the input for this clock generator. For full access to the electronic component's capabilities, 1 circuits are implemented. A clock-based RF synthesizer that provides a max frequency of 712.5MHz is available. With the Surface Mount, it is easy to install this electric component on the panel. The digital clock generator incorporates CLOCK GENERATOR, PROCESSOR SPECIFIC uPs, uCs, and peripheral ICs. This clock PLL works with a supply voltage of 1.71V~3.47V. Using the test statistics, it is estimated that the ambient temperature should be set to -40°C~85°C. A frequency synthesizer which is compatible with the CML, HCSL, LVCMOS, LVDS, LVPECL logic levels is presented here. The frequency generator has a ALSO REQUIRES 3.3V SUPPLY feature to improve the output of clock signals. A supply current exceeding 240mA may cause an element to melt.
SI5347C-B-GM Features
Available in the 64-VFQFN Exposed Pad
Supply voltage of 1.8V

SI5347C-B-GM Applications
There are a lot of Silicon Labs
SI5347C-B-GM Clock Generators applications.

Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet
FPGA and processor clocks
Line cards used in telephone exchange
Fiber Channel
PCI express cards

Factory Lead Time	4 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	64-VFQFN Exposed Pad
Operating Temperature	-40°C~85°C
Packaging	Tray
Published	1997
Part Status	Not For New Designs
Moisture Sensitivity Level (MSL)	2 (1 Year)
Number of Terminations	64
ECCN Code	EAR99
Additional Feature	ALSO REQUIRES 3.3V SUPPLY
Voltage - Supply	1.71V~3.47V
Terminal Position	QUAD
Terminal Form	NO LEAD
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	40
Output	CML, HCSL, LVCMOS, LVDS, LVPECL
JESD-30 Code	S-XQCC-N64
Qualification Status	Not Qualified
Number of Circuits	1
uPs/uCs/Peripheral ICs Type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Supply Current-Max	240mA
Frequency (Max)	712.5MHz
Input	LVCMOS, LVDS, LVPECL, Crystal
Ratio - Input:Output	5:4
Primary Clock/Crystal Frequency-Nom	54MHz
PLL	Yes
Differential - Input:Output	Yes/Yes
Divider/Multiplier	Yes/No
Length	9mm
Height Seated (Max)	0.9mm
Width	9mm
RoHS Status	RoHS Compliant