ISPLSI 2128VE-180LB100 Overview 128 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.The item is enclosed in a 100-LFBGA package.The device is programmed with 64 I/O ports.It is programmed to terminate devices at 100.There is a BOTTOM terminal position on the electrical part in question.The device is powered by a voltage of 3.3V volts.It is recommended that the chip be packaged by Tray.Ensure its reliability by operating at 0°C~70°C TA.It is recommended to mount the chip by Surface Mount.FPGAs belonging to the ispLSI® 2000VE series contain this type of chip.With 100 pins programmed, the chip is ready to use.You can find its related parts in the ISPLSI 2128.6000 gates are used to construct digital circuits.32 logic elements/blocks exist.A power supply of 3.3V volts is required to operate this device.Initially, the maximum supply voltage (Vsup) is 3.6V.The status of input signals is determined by 4 dedicated inputs.Voltage supply (Vsup) should be higher than 3V.The clock frequency of this device should not exceed 125MHz.
ISPLSI 2128VE-180LB100 Features100-LFBGA package
64 I/Os
The operating temperature of 0°C~70°C TA
100 pin count
3.3V power supplies
ISPLSI 2128VE-180LB100 ApplicationsThere are a lot of Lattice Semiconductor Corporation
ISPLSI 2128VE-180LB100 CPLDs applications.
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
Field programmable gate
Address decoding
D/T registers and latches
Synchronous or asynchronous mode
| Mounting Type | Surface Mount |
| Package / Case | 100-LFBGA |
| Surface Mount | YES |
| Operating Temperature | 0°C~70°C TA |
| Packaging | Tray |
| Series | ispLSI® 2000VE |
| Published | 2000 |
| JESD-609 Code | e0 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | EAR99 |
| Terminal Finish | Tin/Lead (Sn63Pb37) |
| HTS Code | 8542.39.00.01 |
| Terminal Position | BOTTOM |
| Terminal Form | BALL |
| Peak Reflow Temperature (Cel) | 240 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.8mm |
| Reach Compliance Code | not_compliant |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | ISPLSI 2128 |
| Pin Count | 100 |
| JESD-30 Code | S-PBGA-B100 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 3.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 64 |
| Clock Frequency | 125MHz |
| Propagation Delay | 7.5 ns |
| Number of Gates | 6000 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | NO |
| Number of Dedicated Inputs | 4 |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 5ns |
| Number of Logic Elements/Blocks | 32 |
| Length | 10mm |
| Height Seated (Max) | 1.5mm |
| Width | 10mm |
| RoHS Status | Non-RoHS Compliant |
ISPLSI 2128VE-180LB100 Datasheet
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