74HC299N,652 OverviewThe package 20-DIP (0.300, 7.62mm) includes it. In the way of Tube, it is packaged. It achieves superior flexibility through 8-Bit circuits. This electrical device is of the Universal Shift Register logic type. The electronic part is mounted in Through Hole-direction. There should be a temperature difference between -40°C~125°C and the operating temperature. Featuring high and low output currents, 6mA 6mA offers maximum design versatility. FPGAs in the 74HC series are this type. The voltage at which it operates is 2V~6V. It belongs to the 74HC299 family. Transmission lines can be terminated with 20 terminations by using a device that matches the characteristic impedance. When the supply voltage is above 5V, the device will operate normally. 20 pins are included. Electronic parts such as this one are designed with 8 Bits. There is an electronic device in this family called HC/UH. When Vsup reaches 6V, the maximum supply voltage has been reached. There should be a difference between Vsup and 2V in the supply voltage. 2/6V power supplies are used to power it. POSITIVE EDGE is the trigger configured with it. In addition to this, it is also characterized by HOLD MODE; COMMON I/O PINS; TOTEMPOLE SERIAL SHIFT RIGHT & SHIFT LEFT OUTPUTS; GATED OUTPUT CONTROL.
74HC299N,652 Features 20-DIP (0.300, 7.62mm) package
74HC series
74HC299 family
20 pin count
2/6V power supplies
74HC299N,652 ApplicationsThere are a lot of NXP USA Inc.
74HC299N,652 Universal Bus Functions applications.
Wearable Health and Fitness Devices
Tablets
Industrial Controls
Telecommunications
Instrumentation Systems
Air conditioner
Home theater
Electric grinding wheel
Electrical tools
Sewing machine
| Mounting Type | Through Hole |
| Package / Case | 20-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | -40°C~125°C |
| Packaging | Tube |
| Series | 74HC |
| Published | 2008 |
| JESD-609 Code | e4 |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
| Number of Terminations | 20 |
| Terminal Finish | NICKEL PALLADIUM GOLD |
| Additional Feature | HOLD MODE; COMMON I/O PINS; TOTEMPOLE SERIAL SHIFT RIGHT & SHIFT LEFT OUTPUTS; GATED OUTPUT CONTROL |
| HTS Code | 8542.39.00.01 |
| Voltage - Supply | 2V~6V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | 260 |
| Number of Functions | 1 |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | 74HC299 |
| Pin Count | 20 |
| JESD-30 Code | R-PDIP-T20 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 6V |
| Power Supplies | 2/6V |
| Supply Voltage-Min (Vsup) | 2V |
| Number of Circuits | 8-Bit |
| Load Capacitance | 50pF |
| Number of Bits | 8 |
| Family | HC/UH |
| Output Characteristics | 3-STATE |
| Current - Output High, Low | 6mA 6mA |
| Logic Type | Universal Shift Register |
| Output Polarity | TRUE |
| Trigger Type | POSITIVE EDGE |
| Propagation Delay (tpd) | 60 ns |
| fmax-Min | 17 MHz |
| Count Direction | BIDIRECTIONAL |
| Max Frequency@Nom-Sup | 20000000Hz |
| Length | 26.73mm |
| Height Seated (Max) | 4.2mm |
| Width | 7.62mm |
| RoHS Status | ROHS3 Compliant |