DS1013M-25 OverviewIt is packaged using Tube for cost-effectiveness. The 8-DIP (0.300, 7.62mm) package eliminates the need for additional insulating hardware in applications. The supply voltage of 4.75V~5.25V makes reliable performance possible. The technique of Through Hole is employed as its mounting type. It features 0°C~70°C operating temperature. It is configured with 1 taps/steps. The terminals are placed at DUAL. It is equipped with 8 terminations for unique configuration. The supply voltage of 5V is provided when operating. SILICON DELAY LINE is used as its logic type. It is acceptable for it to operate with the minimum supply voltage of 4.75V. It is acceptable for it to operate with the maximum supply voltage of 5.25V. It is a key active component of the family of CMOS. Its BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT combined with other specific characteristics make it well suited for various applications.
DS1013M-25 FeaturesSupply voltage at Tube volts
operate supply current at 5V
with SILICON DELAY LINE bits
stay resistance at CMOS
DS1013M-25 ApplicationsThere are a lot of Rochester Electronics, LLC
DS1013M-25 Delay Lines Timing ICs applications.
Noise Discriminators/Pulse Qualifiers
Delay Matching
Switch Debouncing
High Vibration, High Acceleration Environments
Portable and Battery-Powered Equipment
Clock Synchronization
Digital Systems
Embedded Systems
Utility Meters
Security Systems
| Mounting Type | Through Hole |
| Package / Case | 8-DIP (0.300, 7.62mm) |
| Surface Mount | NO |
| Operating Temperature | 0°C~70°C |
| Packaging | Tube |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Obsolete |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 8 |
| Terminal Finish | TIN LEAD |
| Additional Feature | BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT |
| Voltage - Supply | 4.75V~5.25V |
| Terminal Position | DUAL |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Supply Voltage | 5V |
| Terminal Pitch | 2.54mm |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| JESD-30 Code | R-PDIP-T8 |
| Function | Multiple, NonProgrammable |
| Qualification Status | COMMERCIAL |
| Supply Voltage-Max (Vsup) | 5.25V |
| Supply Voltage-Min (Vsup) | 4.75V |
| Family | CMOS |
| Output Polarity | TRUE |
| Logic IC Type | SILICON DELAY LINE |
| Number of Taps/Steps | 1 |
| Number of Independent Delays | 3 |
| Delay to 1st Tap | 25ns |
| Programmable Delay Line | NO |
| Total Delay-Nom (td) | 25 ns |
| Height Seated (Max) | 4.572mm |
| Width | 7.62mm |
| RoHS Status | Non-RoHS Compliant |