EPM7128AETI100-7N OverviewThis network has 128macro cells, which are cells that provide radio coverage provided by a high-power cell site (tower, antenna, mast).You can find it in package 100-TQFP.As a result, it has 84 I/O ports programmed.100 terminations have been programmed into the device.Its terminal position is QUAD.It is powered by a voltage of 3.3V volts.Package the chip by Tray.In order to ensure the reliability of the device, it is designed to operate at a temperature of [0].Chips should be mounted by Surface Mount.In terms of FPGAs, it belongs to the MAX® 7000A series.Its related parts can be found in the [0].The 2500 gates serve as building blocks for digital circuits.This logic block consists of 8 logic elements.A total of 2.5/3.33.3V power supplies are needed to run it.3.6V represents the maximal supply voltage (Vsup).Ensure that the supply voltage (Vsup) exceeds 3V.This device should not have an clock frequency greater than 129.9MHz.The output is configured with the value 84.Inputs for the device are [0].
EPM7128AETI100-7N Features100-TQFP package
84 I/Os
The operating temperature of -40°C~85°C TA
2.5/3.33.3V power supplies
84 outputs
EPM7128AETI100-7N ApplicationsThere are a lot of Intel
EPM7128AETI100-7N CPLDs applications.
Discrete logic functions
Bootloaders for FPGAs
Address decoders
Custom state machines
Digital systems
Portable digital devices
Handheld digital devices
Battery operated portable devices
Complex programmable logic devices
Digital designs
| Factory Lead Time | 8 Weeks |
| Mounting Type | Surface Mount |
| Package / Case | 100-TQFP |
| Surface Mount | YES |
| Operating Temperature | -40°C~85°C TA |
| Packaging | Tray |
| Series | MAX® 7000A |
| JESD-609 Code | e3 |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 100 |
| ECCN Code | 3A991 |
| Terminal Finish | Matte Tin (Sn) |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 260 |
| Supply Voltage | 3.3V |
| Terminal Pitch | 0.5mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Base Part Number | EPM7128 |
| JESD-30 Code | S-PQFP-G100 |
| Number of Outputs | 84 |
| Qualification Status | Not Qualified |
| Supply Voltage-Max (Vsup) | 3.6V |
| Power Supplies | 2.5/3.33.3V |
| Supply Voltage-Min (Vsup) | 3V |
| Programmable Type | In System Programmable |
| Number of I/O | 84 |
| Clock Frequency | 129.9MHz |
| Propagation Delay | 7.5 ns |
| Architecture | PLA-TYPE |
| Number of Inputs | 84 |
| Number of Gates | 2500 |
| Output Function | MACROCELL |
| Number of Macro Cells | 128 |
| JTAG BST | YES |
| Voltage Supply - Internal | 3V~3.6V |
| Delay Time tpd(1) Max | 7.5ns |
| Number of Logic Elements/Blocks | 8 |
| Length | 14mm |
| Height Seated (Max) | 1.27mm |
| Width | 14mm |
| RoHS Status | RoHS Compliant |