SI5345D-B-GM Overview
As a clock IC, PLLs is packaged using the Tray method. This clock generator is embedded in the 64-VFQFN Exposed Pad package. Under reflowing process, this clock generator ic is able to sustain a maximum temperature of 260. 64 terminations can be found in frequency synthesizer. Basically, a voltage of 1.8V should be applied to this electronic frequency generator. LVCMOS, LVDS, LVPECL, Crystal is designed as this clock generator's input. 1 circuits are implemented to access the electronic component's full performance. This clock-based frequency generator provides a frequency up to 350MHz Max. This component can be conveniently installed on the panel thanks to the Surface Mount. The number of uPs/uCs/Peripheral IC this time clock generator incorporates is CLOCK GENERATOR, PROCESSOR SPECIFIC. Clock PLL works with 1.71V~3.47V supply voltage provided. The ambient temperature should be set at -40°C~85°C, which is estimated by the test statistics. This is a clock generator compatible with CML, HCSL, LVCMOS, LVDS, LVPECL logic levels. For better clock signal output, this clock PLL is featured with ALSO REQUIRES 3.3V SUPPLY.
SI5345D-B-GM Features
Available in the 64-VFQFN Exposed Pad
Supply voltage of 1.8V

SI5345D-B-GM Applications
There are a lot of Silicon Labs
SI5345D-B-GM Clock Generators applications.

Instrument
Automatic test equipment
Wide area power system
Digital circuits
Wireless base station for LTE, LTE-advanced
Picocells, femtocells and small cells
Sampling clocks for ADC and DAC
1 Gigabit Ethernet
10 Gigabit Ethernet
FPGA and processor clocks

Factory Lead Time	4 Weeks
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	64-VFQFN Exposed Pad
Operating Temperature	-40°C~85°C
Packaging	Tray
Published	2014
Part Status	Not For New Designs
Moisture Sensitivity Level (MSL)	2 (1 Year)
Number of Terminations	64
ECCN Code	EAR99
Additional Feature	ALSO REQUIRES 3.3V SUPPLY
Voltage - Supply	1.71V~3.47V
Terminal Position	QUAD
Terminal Form	NO LEAD
Peak Reflow Temperature (Cel)	260
Supply Voltage	1.8V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	40
Output	CML, HCSL, LVCMOS, LVDS, LVPECL
JESD-30 Code	S-XQCC-N64
Number of Circuits	1
uPs/uCs/Peripheral ICs Type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Frequency (Max)	350MHz
Input	LVCMOS, LVDS, LVPECL, Crystal
Ratio - Input:Output	5:10
Primary Clock/Crystal Frequency-Nom	54MHz
PLL	Yes
Differential - Input:Output	Yes/Yes
Divider/Multiplier	Yes/No
Length	9mm
Height Seated (Max)	0.9mm
Width	9mm
RoHS Status	RoHS Compliant